Broadcom India Pvt Ltd is hiring Engineer, Staff II
- IC Design in Bengaluru/Bangalore
About the Company
Broadcom India Pvt Ltd
http://www.broadcom.com
http://www.broadcom.com
Key messages:Broadcom is a rapidly growing company. The
growth is being fueled by expansion in numerous end-markets, both wired and
wireless.We are in a very strong financial position Our wired and wireless
products play an integral role in enabling faster, better, more cost-effective
communicationsElevator Pitch:Broadcom is a global leader in broadband
communications semiconductors, with about $3.5 billion in annual sales.Much of
the world?s voice, video and data touch Broadcom?s products as information
flows to and throughout equipment in the home, the office and in mobile
settings worldwide.
Job Description
Become member of a rapidly growing CPU (ARM, MIPS) and L2
Cache sub-system Design Verification team and work on the next generation CPU
core DV tasks. Looking for engineers who could assist with both block level as
well as chip and system level design verification tasks. You will be a member
of a dedicated and highly skilled technical team with a proven track record of
producing high frequency CPU cores. Growth opportunities are in leading DV
tasks while working with a group of highly talented and experienced engineers
in a truly mutual learning environment. Key Responsibilities: - Execute
functional verification test plans - Participate in debug and coverage related
tasks - Develop verification environment and architect test generators for
block and system level test environment
Apply Here
Salary: Not
Disclosed by Recruiter
Industry: IT-Software / Software
Services
Farea: IT
Software - Embedded, EDA, VLSI, ASIC, Chip Design
Role Category: Programming
& Design
Role: Database
Architect/Designer
Education:
UG - B.Sc
PG - M.Sc
PG - M.Sc
BS/MS/PhD in Computer Science, Electrical, Electronics or
Computer Engineering
- 2 to 3 years of prior work hands-on work experience in the DV domain
- Knowledge of Verilog, System Verilog and/or C/C++
- CPU and/or Cache Coherence Architecture knowledge a must
- Good communication skills and a team player
- 2 to 3 years of prior work hands-on work experience in the DV domain
- Knowledge of Verilog, System Verilog and/or C/C++
- CPU and/or Cache Coherence Architecture knowledge a must
- Good communication skills and a team player
Click Here To Register Your Resume
Check Details Here
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